ACRF49 uses AMD's RFSoC Gen3 series ZU49DR main chip, supports 16-channel 14-bit RF-ADC input, the maximum sampling rate can reach 2.5GSPS, 16-channel 14-bit RF-DAC output, the maximum sampling rate can reach 9.85GSPS
ACRF49 uses AMD's RFSoC Gen3 series ZU49DR main chip, supports 16-channel 14-bit RF-ADC input, the maximum sampling rate can reach 2.5GSPS, 16-channel 14-bit RF-DAC output, the maximum sampling rate can reach 9.85GSPS

The chip uses the Zynq UltraScale+ XCZU49DR FPGA chip, which integrates Quad ARM Cortex-A53 and Dual ARM Cortex-R5F processors, and supports real-time operating systems (RTOS) running in parallel with Linux.

ACRF49 is a powerful single-chip adaptive radio platform that provides direct RF sampling up to 6GHz, with a multi-element processing system: FPGA, real-time dual-core ARM and quad-core ARM, capable of sampling and processing RF signals

Main features:
01. Adaptable single-chip radio platform
02. Transfer RF design to the digital domain
03. Programmable logic for different needs and emerging standards
04. Reduce PCB area compared to discrete solutions
05. Future-oriented integrated solution
06. Frequency band coverage below 6GHz, RF direct sampling mode
07. Support 1x~40x interpolation/decimation coefficients


*Click on the above image to view the details of AXRF49 development board>>
FPGA Model
XCZU49DR-2FFVF1760
Core CPU
Quad-core ARM Cortex-A53
Dual-core ARM Cortex-R5F
14 bit 2.5GSPS RF-ADC
16
14 bit 9.85GSPS RF-DAC
16
Decimation/ interpolation
1x, 2x, 3x, 4x, 5x, 6x, 8x, 10x, 12x, 16x, 20x, 24x, 40x
GTY / GTR
PL side GTY 16x/PS side GTR 4x
System Logic Cell
930K
CLB LUTs
425K
Max.Dist.RAM
13.0Mb
Total Block RAM
38.0Mb
UltraRAM
22.5Mb
DSP Slices
4272
Memory
PS side 5 pieces of 1GB DDR4 total 5GB ECC
PL side 5 pieces of 1GB DDR4 total 5GB
eMMC
1 eMMC chip, standard 8GB
QSPI FLASH
2 64MB QSPI FLASH chips
EEPROM
1 EEPROM, 1Mbit, connected to the PS via IIC bus for communication
Clock Configuration
Provide dual crystal clock
Inter-board connector
Expand 3 high-speed expansion ports, using 3 400-pin inter-board connectors
power supply
The core board is powered by DC 12V, and the power is supplied to the core board through the connector base.
FPGA Core Board
1 block
Size
115mmx85mm

Core board structure dimensions

With Zynq RFSoC, wireless infrastructure manufacturers can achieve significant footprint and power reductions, critical for the development of later MIMO technologies
As a single-chip TRX solution for scalable, multi-function, phased array radar, Zynq RFSoC can achieve low latency transmission and reception in early warning scenarios to achieve optimal response time


Build high-speed, multi-function instruments for signal generation and analysis using direct RF sampling, highly flexible, reconfigurable logic, and software programmability in Zynq RFSoC
Build high-speed, multifunction instruments for signal generation and signal analysis by using direct RF sampling, highly flexible reconfigurable logic, and software programmability in the Zynq RFSoC


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